Overview
Public, component-level PCB life cycle inventory data has historically been thin on the ground. Generic "printed circuit board" datasets exist, but they collapse very different products — a 4-layer commodity FR-4 board and a 40-layer backplane — into one number that doesn't reflect either accurately. For practitioners doing product carbon footprints on servers, networking gear, or automotive electronics, that abstraction is too coarse.
REEL LCI provides per-m² inventories for 19 distinct PCB constructions, from 2-layer flex through 40-layer backplanes, with explicit modeling of layer-count effects on drilling, imaging, plating, and solder mask. Each model traces back to documented public sources — equipment vendor specifications, journal papers on PCB process steps, and industry roadmap data.
The dataset is intended for hardware OEMs, server and networking vendors, and Scope 3 reporters who need PCB inventories at the layer-count and construction granularity their products actually use.
What's covered
The PCB branch of REEL LCI covers rigid, flex, and HDI constructions across 19 models:
- Standard FR-4: 4-layer and 6-layer commodity boards.
- Server boards: 12-, 14-, and 16-layer high-performance computing PCBs.
- Networking boards: 18- and 20-layer high-speed boards.
- Backplanes: 24-, 28-, 32-, and 40-layer ultra-high-layer-count constructions with back-drilling.
- HDI: 8- and 10-layer high-density interconnect with laser microvias.
- Flex & rigid-flex: 2-layer flex and rigid-flex hybrids.
- Application-specific: automotive ECU, memory DIMM PCB, smartphone SLP (substrate-like PCB), and RF/microwave hybrid (radar) boards.
Surface finishes — HASL, OSP, ENIG, ENEPIG, immersion silver, immersion tin, hard gold — are published as separate variants of each base PCB model, so practitioners pick the one matching their board rather than averaging across finishes.
Methodology
Each PCB process step (inner-layer imaging, mechanical drilling, laser microvia drilling, electroless copper, electroplating, solder mask, surface finish, electrical test) is modeled as a unit process with explicit per-m² energy, chemistry, water, and emission flows. The complete board inventory is then a sequence of those steps with layer-count-aware multipliers — for example, drilling energy scales with via density, plating energy scales with copper area, and lamination energy scales with the number of pre-preg layers.
The result is that switching from a 4-layer to a 16-layer model isn't a constant scaling factor — it's a re-traversal of the process flow with the right multipliers, which captures the super-linear increase that the 40-layer-PCB insight documents in detail. Per-m² is the natural inventory unit; per-board is a downstream conversion. The full methodology is in the REEL LCI Methodology Report v0.1 (PDF), Chapter 4.
Related insights
- The 40-Layer PCB Problem — full scaling-curve analysis from 4L to 40L, plus surface-finish comparison.
- The Chiplet Tradeoff — how packaging substrates and PCBs share the burden when chiplet designs replace monolithic dies.
- The Packaging Crossover — at advanced nodes, the package can match the chip itself in embodied impact.
- The Spend-Based GPU Gap — why activity-based PCB inventories matter when spend-based factors over- or under-estimate by orders of magnitude.
Frequently asked questions
REEL LCI covers 19 PCB models spanning 2-layer flex, 4- and 6-layer standard FR-4, 8- and 10-layer HDI, 12- through 16-layer server boards, 18- and 20-layer networking boards, 24- through 40-layer backplanes, plus rigid-flex, automotive ECU, memory DIMM, smartphone SLP, and RF/microwave hybrid constructions. Each model is a complete inventory per square meter of fabricated board.
Each base PCB construction is published with surface-finish variants as separate datasets — HASL (lead-free), OSP, ENIG, ENEPIG, immersion silver, immersion tin, and hard gold on selected models. Practitioners pick the variant matching their board rather than averaging across finishes; the surface finish can swing total embodied impact meaningfully on small-area boards, which is why the variants exist as discrete datasets rather than a single "PCB" aggregate.
PCB fabrication processes (drilling, imaging, plating, lamination, solder mask) all scale with board area, so per-m² is the natural unit for inventory work. Practitioners convert to per-board by multiplying by the board's footprint. This avoids embedding a specific board size in the inventory and makes scenario analysis (e.g., comparing a 4-layer vs 40-layer board of the same area) directly comparable.
Yes. The HDI 8-layer and HDI 10-layer models include laser-drilled microvias with stack-up energy and chemistry inventories. Backplane and high-layer-count models include controlled-depth back-drilling for stub elimination. Some specialty modern processes (e.g., advanced mSAP for SLP smartphone boards, certain laser-microvia variants for radar specialty boards) have partial coverage with documented gaps — see the methodology report for the current gap list.